1. Field of the Invention
The present invention relates to a method for dry-etching a polycide film formed on a semiconductor substrate, in particular to the dry-etching of a polycide film used for the manufacture of MOS semiconductor devices.
2. Description of the Related Art
With the recent increase in the integration and density of MOS semiconductor devices, in micro-processing fields forming gate electrodes by dry-etching polycide films, the reduction of the micro-loading effect, the decrease in mask area dependency, and the improvement of the selection ratio of insulation films against underlying materials have been demanded. Here, the micro-loading effect means an effect in anisotropic etching that in a fine space formed by patterning a photoresist film on a silicon substrate, since the proportions of ions and radicals incident slightly diagonally cannot reach the polycide film due to the interference of the side wall of the photoresist film increase, the etching speed lowers compared with that in a wide space.
In FIG. 5, which shows a sectional view illustrating prior art etching, a gate insulation film (thermal oxide film) 52, a polysilicon film 53, and a metal silicide film 54 are sequentially formed on a silicon substrate 51 constituting a laminate, and on the metal silicide film 54 is formed a photoresist pattern 55. The underlying polysilicon film 53 and the overlying metal silicide film 54 are collectively referred to as a polycide film. In order to form a gate electrode consisting of a polycide film after a layered structure as shown in FIG. 5 is prepared, anisotropic dry-etching is first performed in the first etching step on the overlying metal silicide film 54 through a chemical reaction using an etching gas containing a fluorine-based gas (e.g., SF.sub.6). Then in the second etching step, anisotropic etching is performed on the polysilicon film 53 using an etching gas containing Cl.sub.2 and HBr but not containing F.
The reason why the polycide film is etched in two steps is that a problem will arise if etching is performed at once from the overlying metal silicide film 54 to underlying polysilicon film 53 under the etching conditions used in the first etching step (etching with a gas containing fluorine-based gas (e.g., SF.sub.6)). That is, since the selection ratio against the oxide film is small and the etching speed is high under these etching conditions, when the underlying gate insulation film 52 is very thin (for example, less than 60 nm), the silicon substrate 51 may be etched through the gate insulation film 52, and the diffusion layer may be damaged. Therefore, over-etching cannot be performed sufficiently, and as the result, the underlying polysilicon film 53 is not removed leaving the residue.
Therefore, the two-step etching, in which the overlying metal silicide film 54 and the underlying polysilicon film 53 are etched separately, is required. In the first step etching, however, if even a little amount of the overlying metal silicide film 54 remains, the overlying metal silicide film 54 can be little etched under the second step etching conditions, resulting in poor shape caused by the residue and the like. As FIG. 2 shows, therefore, the first step etching must be performed until the metal silicide film 54 on the place where the etching speed is the lowest is removed.
As described above, however, since an etching gas containing SF.sub.6 is used in the first step etching, the micro-loading effect described above increases, and at the same time, since the selection ratio against polysilicon is as small as about 0.5 when this type of etching gas is used, the etching speed (etch rate) of the underlying polysilicon film 53 is about twice higher than the etch rate of the overlying metal silicide 54, the following inconvenience will occur.
For example, difference in etch rates is large between a narrow space pattern of 0.4 .mu.m or less and a wide space pattern, and when the narrow space pattern is completely removed, the underlying polysilicon film 53 under the wide space pattern has already been removed significantly. Since etching proceeds to the gate insulation film 52 when the polysilicon film 53 is thin, substrate damage will easily occur in the place of a wide space pattern if the second step etching is performed in this state. Even if no substrate damages occur, a notch (undercut) 56 as shown in FIG. 3 or a side-etching 57 as shown in FIG. 4 will easily occur in the lower portion of the underlying polysilicon film 53.
As a method to minimize such an inconvenience, there has been proposed an etching method in which an etching gas containing Cl.sub.2 and O.sub.2 gases of a pressure of about 5 to several tens mT and a plasma density of 1.times.10.sup.11 to 1.times.10.sup.13 cm.sup.-3 is used. With this etching method, since the micro-loading effect is smaller, and the selection ratio against polysilicon is larger than in the method using a fluorine-based gas described above, the above problems can be solved. On the other hand, however, due to the use of Cl.sub.2 gas, the selection ratio against the photoresist is small, resulting in the occurrence of beveling 58 on the metal silicide film 54 as shown in FIG. 5. This phenomenon will become significant as the size of the gate electrode will decrease. This is because a KrF excimer laser (248 nm) and the like will be used as a light source in place of conventionally used i-line (365 nm) for the miniaturization of semiconductor devices; however, the etching resistance of the photoresist for excimer laser exposure is inferior to the etching resistance of the photoresist for i-line, and decrease in film thickness during developing and etching.
In order to avoid the thickness decrease of the photoresist film 55 as much as possible, a method is considered in which the plasma density is increased, and energy for incorporating ions, which is the etchant, is decreased. By this method, however, the number of radicals increases due to a high plasma density, and accordingly, the horizontal component of the kinetic energy of the etchant for the silicon substrate 51 increases, resulting in the loss of anisotropy of etching, and the occurrence of side-etching 59 (FIG. 6) or inversely tapered notch 56 (FIG. 3) on the metal silicide film 54.
In contrast, in the first etching step, when the plasma density is not increased so much, and the etchant ion incorporating energy is decreased to a value not causing defective shape such as side etching 59 and the notch 56 to occur, no beveling is produced. However, as FIG. 2 shows, the state may occur in which the residual photoresist film 55 is little present on the end portions of the pattern, and the margin is small. Therefore, also in the second etching step, the more photoresist 55 is removed, and if the time for over-etching becomes long, the amount of the photoresist film 55 removed in the second etching step cannot be neglected. Therefore, since improvement cannot be fully achieved by only change in the etching conditions of the first etching step, change in the etching conditions of the second etching step is also required.
In the second etching step, it is required to etch only the underlying polysilicon film 53, but not to remove the thin gate insulation film 52 as much as possible. For this, increase in the plasma density to the order of 1.times.10.sup.12 cm.sup.-3 is attempted to improve the selection ratio against the gate insulation film 52. However, due to increase in the plasma density, the number of high-energy electrons increases, and the charge-up phenomenon, in which electric charge is accumulated on the gate electrode (polysilicon film 53) on the gate insulation film 52, will easily occur. The charge-up phenomenon is well known to cause the poor withstand voltage of the gate insulation film 52. Even when no charge-up phenomenon occurs, the notch 56 may be produced in the interface between the polysilicon film 53 and the gate insulation film 52 as FIG. 3 shows.
As an improved second etching step, there is a method in which the metal silicide film 54 having a high melting point is etched in the first etching step by an etching gas containing a fluorine-based gas and HBr to immediately before the interface with the polysilicon film 53, and the remaining portion of the metal silicide film having a high melting point and the polysilicon film are etched in the second etching step by an HBr-based etching gas or an etching gas containing Cl.sub.2 and HBr. By this method, high anisotropy of etching is achieved in the second etching step through the deposition of the reaction product of the photoresist and Br having the side wall protection effect, and the occurrence of the undercut or notch on the polysilicon film can be prevented.
However, since ECR (Electron Cyclotron Resonance) plasma of a high radical concentration (plasma density: 1.times.10.sup.12 to 1.times.10.sup.13 cm.sup.-3)is used, if deposition decreases weakening the side-wall protection effect accompanied by the improvement of selection ratios against the photoresist, side-etching 57 occurs easily on the polysilicon film 53 as FIG. 4 shows.
In conventional etching methods as described above, since at least one of causes for poor withstand voltage, such as decrease in the thickness of the photoresist film or defective shapes such as the beveling of the gate electrode by high plasma, side-etching, notch, and charge-up, occurs accompanied by narrower gate electrodes, these methods have not been applied to such devices as the initial thickness of the gate electrode is less than 6 nm. On the other hand, the gate structure tends to be thinner with increase in planar semiconductor devices, and therefore, the etch rate of polysilicon films, especially in the second etching step, is no longer required to be high as in conventional methods. Therefore, for the control of the end-point (end-point detection), an etch rate of 100 to 200 nm/min is considered to be suitable. The control of the end point used herein means to control stopping etching based on change in the intensity of light emitting by the completion of reaction when all the substances to be etched have been removed, or the differential value thereof.